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74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) product specification 1999 sep 14 integrated circuits
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 2 1999 sep 14 8532169 22330 features ? wide supply voltage range of 1.2 v to 3.6 v ? complies with jedec standard no. 8-1a/5/7. ? cmos low power consumption ? input/output tolerant up to 3.6 v ? low inductance multiple v cc and gnd pins for minimum noise and ground bounce description the 74AVCM162834 is an 18-bit universal bus driver. data flow is controlled by output enable (oe ), latch enable (le ) and clock inputs (cp). this product is designed to have an extremely fast propagation delay and a minimum amount of power consumption. to ensure the high-impedance state during power up or power down, oe should be tied to v cc through a pullup resistor (live insertion). pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 nc nc y 0 y 1 y 2 y 3 y 4 y 5 gnd v cc gnd y 6 y 7 y 8 y 9 y 10 y 11 gnd y 12 y 13 y 14 v cc y 15 y 16 gnd y 17 oe le gnd nc a 0 gnd a 1 a 2 v cc a 3 a 4 a 5 gnd a 6 a 7 a 8 a 9 a 10 a 11 gnd a 12 a 13 a 14 v cc a 15 a 16 gnd a 17 cp gnd sh00156 quick reference data gnd = 0 v; t amb = 25 c; t r = t f 2.0 ns; c l = 30 pf. symbol parameter conditions typical unit t phl /t plh propagation delay an to yn v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v 2.6 2.0 1.7 ns t phl /t plh propagation delay le to yn; cp to yn v cc = 1.8 v v cc = 2.5 v v cc = 3.3 v 2.9 2.3 1.9 ns c i input capacitance 5.0 pf c pd power dissi p ation ca p acitance p er buffer v i = gnd to v cc 1 outputs enabled 25 p f c pd power dissi ation ca acitance er buffer v i = gnd to v cc 1 output disabled 6 f notes: 1. c pd is used to determine the dynamic power dissipation (p d in m w): p d = c pd v cc 2 f i + (c l v cc 2 f o ) where: f i = input frequency in mhz; c l = output load capacitance in pf; f o = output frequency in mhz; v cc = supply voltage in v; (c l v cc 2 f o ) = sum of outputs. ordering information packages temperature range order code drawing number 56-pin plastic thin shrink small outline (tssop) type ii 40 c to +85 c 74AVCM162834 dgg sot364-1
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 3 pin description pin number symbol name and function 1, 2, 55 nc no connection 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 y 0 to y 17 data outputs 4, 11, 18, 25, 32, 39, 46, 53, 56 gnd ground (0 v) 7, 22, 35, 50 v cc positive supply voltage 27 oe output enable input (active low) 28 le latch enable input (active low) 30 cp clock input 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 a 0 to a 17 data inputs logic symbol cp le d oe cp le a 0 y 0 to the 17 other channels sh00157 logic symbol (ieee/iec) 1 ? 1 30 28 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 3 5 6 8 9 10 12 13 14 15 16 17 19 20 21 23 24 26 3d 27 2c3 en1 a 0 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 a 16 a 17 oe cp y 0 y 1 y 2 y 3 y 4 y 5 y 6 y 7 y 8 y 9 y 10 y 11 y 12 y 13 y 14 y 15 y 16 y 17 le c3 g2 sh00158 function table inputs outputs oe le cp a outputs h x x x z l l x l l l l x h h l h l l l h h h l h h x y 0 1 l h l x y 0 2 h = high voltage level l = low voltage level x = don't care z = high impedance aoffo state = low-to-high level transition notes: 1. output level before the indicated steady-state input conditions were established, provided that cp is high before le goes low. 2. output level before the indicated steady-state input conditions were established.
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 4 168-pin sdr sdram dimm sdram sdram sdram sdram sdram sdram sdram sdram sdram the pll clock distribution device and avc registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation sdram sdram sdram sdram sdram sdram sdram sdram sdram avcm16834 pck2509s or pck2510s avcm16834 back side front side avcm16834 sw00407 recommended operating conditions symbol parameter conditions min max unit v cc dc supply voltage (according to jedec low voltage standards) 1.65 2.3 3.0 1.95 2.7 3.6 v cc dc supply voltage (for low voltage applications) 1.2 3.6 v i dc input voltage range 0 3.6 v dc output voltage range; output 3-state 0 3.6 v o dc output voltage range; output high or low state 0 v cc v t amb operating free-air temperature range 40 +85 c t r , t f input rise and fall times v cc = 1.65 to 2.3 v v cc = 2.3 to 3.0 v v cc = 3.0 to 3.6 v 0 0 0 30 20 10 ns/v
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 5 absolute maximum ratings in accordance with the absolute maximum rating system (iec 134) voltages are referenced to gnd (ground = 0v) symbol parameter conditions rating unit v cc dc supply voltage 0.5 to +4.6 v i ik dc input diode current v i 0 50 ma v i dc input voltage for all inputs 1 0.5 to 4.6 v i ok dc output diode current v o v cc or v o 0 50 ma v o dc output voltage; output 3-state note 1 0.5 to 4.6 v v o dc output voltage; output high or low state note 1 0.5 to v cc +0.5 v i o dc output source or sink current v o = 0 to v cc 50 ma i gnd , i cc dc v cc or gnd current 100 ma t stg storage temperature range 65 to +150 c p tot power dissipation per package plastic thin-medium-shrink (tssop) for temperature range: 40 to +125 c above +55 c derate linearly with 8 mw/k 600 mw note: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. dc electrical characteristics over recommended operating conditions. voltage are referenced to gnd (ground = 0 v). limits symbol parameter test conditions temp = -40 c to +85 c unit min typ 1 max v cc = 1.2 v v cc v ih high level in p ut voltage v cc = 1.65 to 1.95 v 0.65v cc 0.9 v v ih high level in ut voltage v cc = 2.3 to 2.7 v 1.7 1.2 v v cc = 3.0 to 3.6 v 2.0 1.5 v cc = 1.2 v gnd v il low level in p ut voltage v cc = 1.65 to 1.95 v 0.9 0.35v cc v v il low level in ut voltage v cc = 2.3 to 2.7 v 1.2 0.7 v v cc = 3.0 to 3.6 v 1.5 0.8 v cc = 1.65 to 3.6 v; v i = v ih or v il ; v cc 020 v cc cc i ih il i o = 100 m a v cc 0 . 20 v cc v oh high level output voltage v cc = 1.65 v; v i = v ih or v il ; i o = 4 ma v cc 0.45 v cc 0.10 v v cc = 2.3 v; v i = v ih or v il ; i o = 8 ma v cc 0.55 v cc 0.28 v cc = 3.0 v; v i = v ih or v il ; i o = 12 ma v cc 0.70 v cc 0.32 v cc = 1.65 to 3.6 v; v i = v ih or v il ; gnd 020 cc i ih il i o = 100 m a gnd 0 . 20 v ol low level output voltage v cc = 1.65 v; v i = v ih or v il ; i o = 4 ma 0.10 0.45 v v cc = 2.3 v; v i = v ih or v il ; i o = 8 ma 0.26 0.55 v cc = 3.0 v; v i = v ih or v il ; i o = 12 ma 0.36 0.70 v cc = 1 65 to 3 6 v ; i i input leaka g e current v cc = 1 . 65 to 3 . 6 v v i =v cc or gnd 0.1 2.5 m a i g v i = v cc or gnd m i off 3-state output off-state current v cc = 0v; v i or v o = 3.6 v 0.1 10 m a i ihz /i ilz 3-state output off-state current v cc = 1.65 to 3.6 v; v i = v cc or gnd 0.1 12.5 m a i oz 3-state out p ut off-state current v cc = 1.65 to 2.7 v; v i = v ih or v il ; v o = v cc or gnd 0.1 5 m a i oz 3 - state out ut off - state current v cc = 3.0 to 3.6 v; v i = v ih or v il ; v o = v cc or gnd 0.1 10 m a i cc quiescent su pp ly current v cc = 1.65 to 2.7 v; v i = v cc or gnd; i o = 0 0.1 20 m a i cc quiescent su ly current v cc = 3.0 to 3.6 v; v i = v cc or gnd; i o = 0 0.2 40 m a notes: 1. all typical values are at t amb = 25 c.
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 6 ac characteristics gnd = 0 v; t r = t f 2.0 ns; c l = 30 pf limits symbol parameter wave- form v cc = 3.3 0.3 v v cc = 2.5 0.2 v v cc = 1.8 0.15 v v cc = 1.2 v unit form min typ 1 max min typ 1 max min typ 1 max min typ propagation delay an to yn 1, 7 0.7 1.7 2.5 0.8 2.0 3.1 1.0 2.6 4.5 5.2 t phl /t plh propagation delay le to yn 2, 7 0.7 1.9 2.7 0.8 2.3 3.3 1.0 2.9 5.0 5.6 ns propagation delay cp to yn 3, 7 0.7 1.7 2.5 0.8 2.0 3.0 1.0 2.6 4.5 5.2 t pzh /t pzl 3-state output enable time oe to yn 6, 7 1.0 2.3 4.5 1.0 2.5 4.5 1.5 3.0 6.5 5.5 ns t phz /t plz 3-state output disable time oe to yn 6, 7 1.0 2.3 3.5 1.0 2.2 4.0 1.5 3.5 6.5 6.9 ns t cp pulse width high or low 3, 7 1.0 1.2 2.0 ns t w le pulse width high 2, 7 1.0 1.2 2.0 ns set-up time an to cp 5, 7 0.7 0.7 0.7 1.0 ns t su set-up time an to le high 4, 7 0.5 0.5 0.5 0.2 ns set-up time an to le low 4, 7 0.5 0.5 0.6 2.0 ns hold time an to cp 5, 7 0.9 0.9 1.0 1.5 ns t h hold time an to le high 4, 7 1.6 1.7 2.0 3.2 ns hold time an to le low 4, 7 1.4 1.5 1.7 2.8 ns f max maximum clock pulse frequency 3, 7 500 400 250 mhz notes: 1. all typical values are measured at t amb = 25 c and at v cc = 1.8 v, 2.5 v, 3.3 v.
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 7 ac waveforms for v cc = 3.0 v to 3.6 v range v m = 0.5 v cc v x = v ol + 0.300 v v y = v oh 0.300 v v ol and v oh are the typical output voltage drop that occur with the output load. v i = v cc ac waveforms for v cc = 2.3 v to 2.7 v and v cc < 2.3 v range v m = 0.5 v cc v x = v ol + 0.15 v v y = v oh 0.15 v v ol and v oh are the typical output voltage drop that occur with the output load. v i = v cc a n input t phl t plh v ol v i gnd v oh y n output sh00132 v m v m note: v m = 0.5v cc at v cc = 2.3 to 2.7 v waveform 1. input (an) to output (yn) propagation delay le input yn output v i gnd v oh v ol t phl t plh t w v m v m v m sh00165 note: v m = 0.5 v cc at v cc = 2.3 to 2.7 v waveform 2. latch enable input (le ) pulse width, the latch enable input to output (yn) propagation delays. cp input yn output v i gnd v oh v ol t phl t plh t w 1/f max sh00135 v m v m v m note: v m = 0.5v cc at v cc = 2.3 to 2.7 v waveform 3. the clock (cp) to yn propagation delays, the clock pulse width and the maximum clock frequency. an input le input t su th note: the shaded areas indicate when the input is permitted to change for predictable output performance. t su th v i gnd v i gnd v m v m sh00166 v m = 0.5v cc at v cc = 2.3 to 2.7 v waveform 4. data set-up and hold times for the an input to the le input v i gnd an input v i gnd v oh yn output v ol cp input t su t h t su t h note: the shaded areas indicate when the input is permitted to change for predictable output performance. sh00136 v m v m v m = 0.5v cc at v cc = 2.3 to 2.7 v waveform 5. data set-up and hold times for the an input to the clock cp input t plz t pzl v i noe input gnd v cc output low-to-off off-to-low v ol v oh output high-to-off off-to-high gnd outputs enabled outputs enabled outputs disabled t phz v m v m v m t pzh v x v y sh00137 note: v m = 0.5v cc at v cc = 2.3 to 2.7 v waveform 6. 3-state enable and disable times
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 8 test circuit switch position pulse generator r t v i d.u.t. v o c l v cc r l test circuit for switching times open gnd s 1 definitions v cc v i < 2.3 v v cc test s 1 t plh/ t phl open r l = load resistor c l = load capacitance includes jig and probe capacitance r t = termination resistance should be equal to z out of pulse generators. 2 v cc t plz/ t pzl v cc 2.32.7 v t phz/ t pzh gnd r l 2 * v cc sv01018 r l 1000 w 500 w v cc 3.0 v 500 w waveform 7. load circuitry for switching times graphs sh00161 pmos 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 350 300 250 200 150 100 50 0 (ma) output current v oh (v) output voltage i oh 1.8v 2.5v 3.3v nmos 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 50 100 150 200 250 300 350 (ma) output current v oh (v) output voltage i oh 1.8v 2.5v 3.3v sh00162
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 9 tssop56: plastic thin shrink small outline package; 56 leads; body width 6.1mm sot364-1
philips semiconductors product specification 74AVCM162834 18-bit registered driver with inverted register enable with 15 w termination resistors (3-state) 1999 sep 14 10 definitions short-form specification e the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition e limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the dev ice at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limi ting values for extended periods may affect device reliability. application information e applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support e these products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use i n such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes e philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors ass umes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or m ask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right in fringement, unless otherwise specified. philips semiconductors 811 east arques avenue p.o. box 3409 sunnyvale, california 940883409 telephone 800-234-7381 ? copyright philips electronics north america corporation 1999 all rights reserved. printed in u.s.a. print code date of release: 09-99 document order number: 9397-750-06412

data sheet status objective specification preliminary specification product specification product status development qualification production definition [1] this data sheet contains the design target or goal specifications for product development. specification may change in any manner without notice. this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. this data sheet contains final specifications. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. data sheet status [1] please consult the most recently issued datasheet before initiating or completing a design.

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